RE: Caller ID unit.

["Ian Davidson" <ian@xxxxxxx>]

Hi Stuart


Ok now re-read the data sheet (must disable the list when busy at
work!). Yes you should be ok to use it that way. It is only the clock
pulses that do not clock the start and stop bits but they are available.
Just make sure to check that the IC is operating in mode 0 by checking
the logic level on it. Sorry for the confusion. To answer the original
question yes Jon's circuit will be fine as far as I can see.

Ian D



-----Original Message-----
From: Stuart Grimshaw [mailto:stuart@xxxxxxx]
Sent: 02 July 2003 10:28
To: UKHA List
Subject: RE: [ukha_d] Caller ID unit.

On Wed, 2003-07-02 at 10:03, Ian Davidson wrote:

> The Mitel chips output is not async but is clocked out with the start
> and stop bits removed (just the data bits). A small micro could easily
> decode this but it is not suitable for the input of a PC RS232 even
when
> level converted. The only solution would be to but a small micro in
> there (read PIC) to re-insert the start and stop bits and then level
> convert but it is probably not worth it.

My reading of the data sheet was that the chip works in two modes, the
one you describe above, and one that is suitable to connect to a PC
after it has been converted to the right levels ... ?

Quoting page 7/8 of the datasheet, describing mode 0:

"This mode is selected when the MODE pin is low. In
this mode, data transfer is initiated by the device.
The MT88E43B receives the FSK signal,
demodulates it, and outputs the data directly to the
DATA pin (refer to Figure 14). For each received stop
and start bit sequence, the MT88E43B outputs a
fixed frequency clock string of 8 pulses at the DCLK
pin. Each clock rising edge occurs in the centre of
each DATA bit cell. DCLK is not generated for the
stop and start bits. Consequently, DCLK will clock
only valid data into a peripheral device such as a
serial to parallel shift register or a micro-controller.
The MT88E43B also outputs an end of word pulse
(data ready) on the DR pin. The data ready signal
indicates the reception of every 10-bit word
(including start and stop bits) sent from the network
to the TE/CPE. This DR signal can be used to
interrupt a micro-controller. DR can also cause a
serial to parallel converter to parallel load its data
into a microcontroller. The mode 0 data pin can also
be connected to a personal computer's serial
communication port after converting from CMOS to
RS-232 voltage levels."

The way I read it is that the clock pin must be connected to the mP but
the data pin can be connected to a PC ... ?




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